The present invention generally relates to the field of magnetic memories. More particularly, the present invention relates to comparing first data bits stored in memory cells to second data bits and providing an indication if each one of the first data bits has a same logic state as a corresponding one of the second data bits.
Magnetic random access memory (MRAM) is a type of non-volatile magnetic memory which includes magnetic memory cells. A typical magnetic memory cell includes a layer of magnetic film in which the magnetization of the magnetic film is alterable and a layer of magnetic film in which magnetization is fixed or xe2x80x9cpinnedxe2x80x9d in a particular direction. The magnetic film having alterable magnetization is typically referred to as a data storage layer, and the magnetic film which is pinned is typically referred to as a reference layer.
A typical magnetic memory includes an array of magnetic memory cells. Word lines extend along rows of the magnetic memory cells, and bit lines extend along columns of the magnetic memory cells. Each magnetic memory cell is located at an intersection of a word line and a bit line. A magnetic memory cell is usually written to a desired logic state by applying external magnetic fields that rotate the orientation of magnetization in its data storage layer. The logic state of a magnetic memory cell is indicated by its resistance which depends on the relative orientations of magnetization in its data storage and reference layers. The magnetization orientation of the magnetic memory cell assumes one of two stable orientations at any given time. These two stable orientations are referred to as xe2x80x9cparallelxe2x80x9d and xe2x80x9canti-parallelxe2x80x9d orientations. With parallel orientation, the orientation of magnetization in the data storage layer is substantially parallel to the magnetization in the reference layer along the easy axis and the magnetic memory cell is in a low resistance state which can be represented by the value R. With anti-parallel orientation, the orientation of magnetization in the data storage layer is substantially anti-parallel to the magnetization in the reference layer along the easy axis and the magnetic memory cell is in a high resistance state which can be represented by the value R+xcex94R. A sense amplifier can be used to sense the resistance state of a selected magnetic memory cell to determine the logic state stored in the memory cell.
Applications for MRAM include replacement of disk drives for portable devices such as small computer systems and personal digital assistants (PDAs). A desirable feature of these devices is the ability to store information which can be efficiently retrieved. One approach used to retrieve the information is to search the memory contents by matching a portion of the desired information. This approach enables the memory to be searched and the data to be retrieved without knowing specific memory address information. Memories which provide this type of searching capability are referred to as content addressable memories (CAMs).
Because of the relatively slow access time of disk drives, the CAM function is typically implemented by a separate memory device. One approach which is used is a CACHE memory. CACHE memories allow searching by matching a portion of the stored information which is stored in a content addressable part of the CACHE memory. The desired data can be returned if it is stored in the CACHE memory, thereby avoiding the longer time required to retrieve the data from the disk drive.
The use of the separate memory components can result in increased power consumption and decreased reliability. Costs can increase because of other components such as memory controllers which may be required to coordinate the data access activities between the separate components.
In view of the above, there is a need for a low power, reliable and cost effective non-volatile memory for CAM applications.
One aspect of the present invention provides a magnetic memory which includes memory cells configured to store first data bits. Compare logic is configured to compare the first data bits to second data bits and provide an indication for each first data bit that has a same logic state as a corresponding second data bit.